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A65H83181 Datasheet 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM

Manufacturer: AMIC Technology

Download the A65H83181 datasheet PDF. This datasheet also includes the A65 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (A65-H73.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number A65H83181
Manufacturer AMIC Technology
File Size 530.68 KB
Description 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM
Datasheet download datasheet A65H83181 Datasheet

General Description

The A65H73361 and A65H83181 are 128k words by 36 bits and 256k words by 18 bits late write synchronous 4Mb SRAMS built using high performance CMOS process.

The differential clock are used to control the timing of read/write operation and all internal operations are selftimed.

The positive edge triggered CK clock input controls all addresses write-enables and Synchronous select and data ins are registered.

Overview

A65H73361/A65H83181 Series Preliminary Document Title 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Revision History Rev.

No.

2.0 History Add JTAG standard Issue Date February 12, 1999 Remark Preliminary PRELIMINARY (February, 1999, Version 2.0) AMIC Technology, Inc.

Key Features

  • n n n n 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Fast access times: 2.5/3.0/3.5ns 128k x 36 or 256k x 18 organizations CMOS technology Register to register synchronous operation with selftimed late write n Single +3.3V ±5% power supply n Individual byte write and global write n n n n n n n HSTL input & output levels Boundary scan(JTAG) IEEE 1149.1 compatible Asynchronous output enable Sleep mode (ZZ) Programmable impedance output drivers JEDEC Standar.