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74HC73 Dual JK flip-flop

74HC73 Description

74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev.7 * 13 September 2021 Product data sheet 1.General .
The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs.

74HC73 Features

* CMOS low-power dissipation
* Wide supply voltage range from 2.0 to 6.0 V
* High noise immunity
* Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
* Complies with JEDEC standards
* JESD8C (2.7 V to 3.6 V)
* JESD7A (2.0 V to 6.0

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