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74AHC373 - Octal D-type transparant latch

74AHC373 Description

74AHC373 Octal D-type transparant latch; 3-state Rev.4 * 5 March 2019 Product data sheet 1.General .
The 74AHC373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

74AHC373 Features

* Balanced propagation delays
* All inputs have a Schmitt-trigger action
* Common 3-state output enable input
* Inputs accepts voltages higher than VCC
* Functionally identical to the 74AHC573; 74AHCT573
* Input levels at CMOS input level
* ESD

74AHC373 Applications

* A latch enable input (LE) and an output enable input (OE) are common to all latches. When pin LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i. e. a latch output will change state each time its corresponding Dn input changes. When pin LE is LOW,

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Octal D-type transparant latch nexperia
nexperia 74AHC373-like datasheet