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TPS74401 3.0-A Ultra-LDO

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Description

Product Folder Order Now Technical Documents Tools & Software Support & Community Reference Design TPS74401 SBVS066R * DECEMBER 2005 The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management solution for a wide variety of applications.

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Features

* 1 Input Voltage Range: 1.1 V to 5.5 V
* Soft-Start (SS) Pin Provides a Linear Startup With Ramp Time Set by External Capacitor
* 1% Accuracy Over Line, Load, and Temperature
* Supports Input Voltages as Low as 0.9 V With External Bias Supply
* Adjustable Outp

Applications

* FPGA Applications
* DSP Core and I/O Voltages
* Post-Regulation Applications
* Applications With Special Start-Up Time or Sequencing Requirements

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