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SN74AUC34 - HEX BUFFER GATE

Description

This hex buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC34 performs the Boolean function Y = A.

This device is fully specified for partial-power-down applications using Ioff.

Features

  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Sub-1-V Operable.
  • Max tpd of 1.8 ns at 1.8 V.
  • Low Power Consumption, 10-µA Max ICC.
  • ±8-mA Output Drive at 1.8 V.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human-Body Model (A114-A).
  • 200-V Machine Model (A115-.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com FEATURES • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial-Power-Down Mode Operation • Sub-1-V Operable • Max tpd of 1.8 ns at 1.8 V • Low Power Consumption, 10-µA Max ICC • ±8-mA Output Drive at 1.8 V • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) GND 4Y SN74AUC34 HEX BUFFER GATE SCES474 – AUGUST 2003 – REVISED OCTOBER 2005 RGY PACKAGE (TOP VIEW) 1A VCC 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 7 14 13 6A 12 6Y 11 5A 10 5Y 9 4A 8 DESCRIPTION/ORDERING INFORMATION This hex buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.
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