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SN74AUC1G125-EP Single Bus Buffer Gate

SN74AUC1G125-EP Description

www.ti.com SN74AUC1G125-EP SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCES670 * MARCH 2007 .
ORDERING INFORMATION The SN74AUC1G125 is operational at 0.

SN74AUC1G125-EP Features

* Controlled Baseline
* One Assembly Site
* One Test Site
* One Fabrication Site
* Extended Temperature Performance of
* 55°C to 125°C
* Enhanced Diminishing Manufacturing Sources (DMS) Support
* Enhanced Product-Change Notification

SN74AUC1G125-EP Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and

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Single Bus Buffer Gate Texas Instruments
Texas Instruments SN74AUC1G125-EP-like datasheet