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LP2998 - DDR Termination Regulator

Description

The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of DDR-SDRAM and DDR2 memory.

The device also supports DDR3 and DDR3L VTT bus termination with VDDQ min of 1.35 V.

Features

  • 1 AEC-Q100 Test Guidance with the following results (SO PowerPAD-8):.
  • Device HBM ESD Classification Level H1C.
  • Junction Temperature Range.
  • 40°C to 125°C.
  • 1.35 V Minimum VDDQ.
  • Source and Sink Current.
  • Low Output Voltage Offset.
  • No External Resistors Required.
  • Linear Topology.
  • Suspend to Ram (STR) Functionality.
  • Low External Component Count.
  • Thermal Shutdown 2.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community LP2998, LP2998-Q1 SNVS521K – DECEMBER 2007 – REVISED AUGUST 2014 LP2998/LP2998-Q1 DDR Termination Regulator 1 Features •1 AEC-Q100 Test Guidance with the following results (SO PowerPAD-8): – Device HBM ESD Classification Level H1C – Junction Temperature Range –40°C to 125°C • 1.
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