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LMK1D1216 - Low Additive Jitter LVDS Buffer

Download the LMK1D1216 datasheet PDF. This datasheet also covers the LMK1D1212 variant, as both devices belong to the same low additive jitter lvds buffer family and are provided as variant models within a single manufacturer datasheet.

Description

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11).

Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15).

Features

  • High-performance LVDS clock buffer family: up to 2 GHz.
  • 2:12 differential buffer (LMK1D1212).
  • 2:16 differential buffer (LMK1D1216).
  • Supply voltage: 1.71 V to 3.465 V.
  • Low additive jitter: < 60 fs RMS maximum in 12- kHz to 20-MHz at 156.25 MHz.
  • Very low phase noise floor: -164 dBc/Hz (typical).
  • Very low propagation delay: < 575 ps maximum.
  • Output skew: 20 ps maximum.
  • High-swing LVDS (boosted mode): 500-mV VOD typica.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LMK1D1212-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LMK1D1212, LMK1D1216 SNAS823A – OCTOBER 2021 – REVISED APRIL 2023 LMK1D121x Low Additive Jitter LVDS Buffer 1 Features • High-performance LVDS clock buffer family: up to 2 GHz – 2:12 differential buffer (LMK1D1212) – 2:16 differential buffer (LMK1D1216) • Supply voltage: 1.71 V to 3.465 V • Low additive jitter: < 60 fs RMS maximum in 12- kHz to 20-MHz at 156.
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