LMK04616 Datasheet (Texas Instruments) - Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner

LMK04616, Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner

The LMK0461x device family is the industry’s highest performance and lowest power jitter cleaner with JESD204B support.

The 16 clock outputs can be configured to drive eight JESD204B converters or other logic devices using device and SYSREF clocks.

The 17th output can be configured to provide a sign

LMK04616 Features

* 1 Dual-loop PLL architecture

* Ultra low noise (10 kHz to 20 MHz):

* 48-fs RMS jitter at 1966.08 MHz

* 50-fs RMS jitter at 983.04 MHz

* 61-fs RMS jitter at 122.88 MHz

* 165-dBc/Hz noise floor at 122.88 MHz

* JESD204B support