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DS90UR124-Q1 - 5-MHz to 43-MHz DC-Balanced 24-Bit FPD-Link2 Serializer/Deserializer

Description

The DS90URxxx-Q1 chipset translates a 24-bit parallel bus into a fully transparent data/control FPDLink II LVDS serial stream with embedded clock information.

Features

  • 1 Supports Displays With 18-Bit Color Depth.
  • 5-MHz to 43-MHz Pixel Clock.
  • Automotive-Grade Product AEC-Q100 Grade 2 Qualified.
  • 24:1 Interface Compression.
  • Embedded Clock With DC Balancing Supports AC-Coupled Data Transmission.
  • Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable.
  • No Reference Clock Required (Deserializer).
  • Meets ISO 10605 ESD.
  • Greater than 8 kV HBM ESD Structure.
  • Hot Plug Support.

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Other Datasheets by Texas Instruments

Part Number Description
DS90UR241-Q1 5-MHz to 43-MHz DC-Balanced 24-Bit FPD-Link2 Serializer/Deserializer
DS90UR903Q-Q1 18-Bit Color FPD-Link2 Serializer/Deserializer
DS90UR904Q-Q1 18-Bit Color FPD-Link2 Serializer/Deserializer
DS90UR905Q-Q1 24-bit Color FPD-Link2 Serializer/Deserializer
DS90UR906Q-Q1 24-bit Color FPD-Link2 Serializer/Deserializer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS90UR124-Q1, DS90UR241-Q1 SNLS231O – SEPTEMBER 2006 – REVISED APRIL 2015 DS90URxxx-Q1 5-MHz to 43-MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset 1 Features •1 Supports Displays With 18-Bit Color Depth • 5-MHz to 43-MHz Pixel Clock • Automotive-Grade Product AEC-Q100 Grade 2 Qualified • 24:1 Interface Compression • Embedded Clock With DC Balancing Supports AC-Coupled Data Transmission • Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • No Reference Clock Required (Deserializer) • Meets ISO 10605 ESD – Greater than 8 kV HBM ESD Structure • Hot Plug Support • EMI Reduction – Serializer Accepts Spread Spectrum Input; Data Randomization and Shuffling on Serial Link; D
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