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CD74HC4060 - 14-Stage Binary Counter

Description

The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages.

The oscillator configuration allows design of either RC or crystal oscillator circuits.

A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator.

Features

  • Onboard Oscillator.
  • Common Reset.
  • Negative-Edge Clocking.
  • Fanout (Over Temperature Range) - Standard Outputs.
  • 10 LSTTL Loads - Bus Driver Outputs.
  • . . . 15 LSTTL Loads.
  • Wide Operating Temperature Range . . . -55oC to 125oC.
  • Balanced Propagation Delay and Transition Times.
  • Significant Power Reduction Compared to LSTTL Logic ICs.
  • HC Types - 2V to 6V Operation - High Noise Immunity: NI.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data sheet acquired from Harris Semiconductor SCHS207G February 1998 - Revised October 2003 CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 High-Speed CMOS Logic 14-Stage Binary Counter with Oscillator [ /Title (CD74 HC406 0, CD74 HCT40 60) /Subject (High Speed CMOS Features • Onboard Oscillator • Common Reset • Negative-Edge Clocking • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.
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