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ADC31JB68 - Analog-to-Digital Converter

Description

The ADC31JB68 is a low-power, wide-bandwidth, 16bit, 500-MSPS analog-to-digital converter (ADC).

The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy.

This device is designed to sample input signals of up to 1.3 GHz.

Features

  • 1 Single Channel.
  • 16-Bit Resolution.
  • Maximum Clock Rate: 500 Msps.
  • Small 40-Pin QFN Package (6 x 6 mm).
  • Input Buffer Input Bandwidth (3 dB): 1300 MHz.
  • Aperture Jitter: 80 fs.
  • On Chip Clock Divider: /1, /2, /4.
  • On Chip Dither.
  • Consistent Dynamic Performance Using Foreground and Background Calibration.
  • Input Amplitude and Phase Adjustment.
  • Input Full Scale: 1.7 Vpp.
  • Power Supplies: 1.2/1.8/3.

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Full PDF Text Transcription

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Product Folder Order Now Technical Documents Tools & Software Support & Community ADC31JB68 SLASE60B – SEPTEMBER 2015 – REVISED JANUARY 2019 ADC31JB68 Single-channel, 16-bit, 500-MSPS analog-to-digital converter 1 Features •1 Single Channel • 16-Bit Resolution • Maximum Clock Rate: 500 Msps • Small 40-Pin QFN Package (6 x 6 mm) • Input Buffer Input Bandwidth (3 dB): 1300 MHz • Aperture Jitter: 80 fs • On Chip Clock Divider: /1, /2, /4 • On Chip Dither • Consistent Dynamic Performance Using Foreground and Background Calibration • Input Amplitude and Phase Adjustment • Input Full Scale: 1.7 Vpp • Power Supplies: 1.2/1.
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