74AC11286 Datasheet (Texas Instruments) - 9-BIT PARITY GENERATOR/CHECKER

74AC11286, 9-BIT PARITY GENERATOR/CHECKER

Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Direct Bus Connection for Parity Generation or for Checking by Using the Parity I/O Port Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Pl

74AC11286 Features

* a local output for parity checking and a bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by cascading. The XMIT control input is implemented specifically to accommodate cascading. When the XMIT is low, the parity tree is disabled and the PARI