XCR3384XL - 384 Macrocell CPLD

Xilinx

XCR3384XL Datasheet Preview — Preview of XCR3384XL PDF

Datasheet Details

Part number	XCR3384XL
Manufacturer	Xilinx
File Size	94.59 KB
Description	384 Macrocell CPLD
Datasheet	XCR3384XL_XilinxInc.pdf

XCR3384XL Product details

Description

Description The XCR3384XL is a 3.3V, 384 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions.A total of 24 function blocks provide 9,600 usable gates.Pin-to-pin propagation delays are 7.5 ns with a maximum system frequency of 127 MHz.TotalCMOS™ Design Technique for Fast Zero Power Xilinx offers a TotalCMOS CPLD, both in process technology and design technique.Xilinx employs a cascade of CMOS gates to implement its sum of products instea

Features

Lowest power 384 macrocell CPLD 7.5 ns pin-to-pin logic delays System frequencies up to 127 MHz 384 macrocells with 9,600 usable gates Available in small footprint packages - 144-pin TQFP (118 user I/O) - 208-pin PQFP (172 user I/O) - 256-ball FBGA (212 user I/O) - 324-ball FBGA (220 user I/O) Optimized for 3.3V systems - Ultra low power operation - 5V tolerant I/O pins with 3.3V core supply - Advanced 0.35 micron five layer metal EEPROM process.

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Published: Apr 16, 2005 |