XCR3256XL Datasheet (Xilinx) - 256 Macrocell CPLD

XCR3256XL, 256 Macrocell CPLD

The XCR3256XL is a 3.3V, 256 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions.

A total of 16 logic blocks provide 6,000 usable gates.

Pin-to-pin propagation delays are 7.5 ns with a maximum system frequency of 140 MHz.

TotalCMOS™ Design Techn

XCR3256XL Features

* 7.5 ns pin-to-pin logic delays System frequencies up to 140 MHz 256 macrocells with 6,000 usable gates Available in small footprint packages

* 144-pin TQFP (116 user I/O pins) 208-pi