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WED3EG7233S-JD3 - 256MB - 2x16Mx72 DDR SDRAM UNBUFFERED

Download the WED3EG7233S-JD3 datasheet PDF. This datasheet also covers the WED3EG7233S-D3 variant, as both devices belong to the same 256mb - 2x16mx72 ddr sdram unbuffered family and are provided as variant models within a single manufacturer datasheet.

General Description

The WED3EG7233S is a 2x16Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component.

The module consists of eighteen 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.

Synchronous design allows precise cycle control with the use of system clock.

Key Features

  • Double-data-rate architecture DDR200 and DDR266.
  • JEDEC design specified Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Dual Rank Power supply: 2.5V ± 0.20V JEDEC standard 184 pin DIMM package.
  • JD3 PCB height: 30.48mm (1.20") NOTE: Consul.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (WED3EG7233S-D3_WhiteElectronicDesigns.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number WED3EG7233S-JD3
Manufacturer White Electronic Designs
File Size 345.83 KB
Description 256MB - 2x16Mx72 DDR SDRAM UNBUFFERED
Datasheet download datasheet WED3EG7233S-JD3 Datasheet

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Other Datasheets by White Electronic Designs

Part Number Description
WED3EG7233S-D3 256MB - 2x16Mx72 DDR SDRAM UNBUFFERED
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.datasheet4u.com White Electronic Designs WED3EG7233S-D3 -JD3 ADVANCED* 256MB – 2x16Mx72 DDR SDRAM UNBUFFERED FEATURES Double-data-rate architecture DDR200 and DDR266 • JEDEC design specified Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Dual Rank Power supply: 2.5V ± 0.20V JEDEC standard 184 pin DIMM package • JD3 PCB height: 30.48mm (1.