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TC74HC237AF - 3-TO-8 LINE DECODER/LATCH

Download the TC74HC237AF datasheet PDF. This datasheet also covers the TC74HC237 variant, as both devices belong to the same 3-to-8 line decoder/latch family and are provided as variant models within a single manufacturer datasheet.

Features

  • High s.

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Note: The manufacturer provides a single datasheet file (TC74HC237_Toshiba.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Toshiba

Part Number Description
TC74HC237AP 3-TO-8 LINE DECODER/LATCH
TC74HC238AF 3-to-8 Line Decoder
TC74HC238AP 3-to-8 Line Decoder
TC74HC20AF DUAL 4-INPUT NAND GATE
TC74HC20AP DUAL 4-INPUT NAND GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74HC237AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC237AP, TC74HC237AF 3-to-8 Line Decoder/Latch The TC74HC237A is a high speed CMOS 3-to-8 LINE DECODER ADDRESS LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It is composed of a 3-bit input latches with a common GL enable input and 3-to-8 line decoder with enable inputs G1 and G2 . The 3-bit binary data is stored into the input latch on the high level of GL . The value of this data determines which one of the outputs will go low. When the enable input G1 is held low or G2 is held high, decoding function is inhibited and all the 8 outputs go high.
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