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TC58FVM6B2AFT65 - 64MBIT (8M x 8 BITS/4M x 16 BITS) CMOS FLASH MEMORY

Download the TC58FVM6B2AFT65 datasheet PDF (TC58FVM62A included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 64mbit (8m x 8 bits/4m x 16 bits) cmos flash memory.

Description

The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 8388608 words × 8 bits or as 4194304 words × 16 bits.

Features

  • commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The TC58FVM6T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC58FVM62A_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC58FVM6B2AFT65
Manufacturer Toshiba
File Size 754.53 KB
Description 64MBIT (8M x 8 BITS/4M x 16 BITS) CMOS FLASH MEMORY
Datasheet download datasheet TC58FVM6B2AFT65 Datasheet
Other Datasheets by Toshiba

Full PDF Text Transcription

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TC58FVM6(T/B)2A(FT/XB)65 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64MBIT (8M × 8 BITS/4M × 16 BITS) CMOS FLASH MEMORY DESCRIPTION The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 8388608 words × 8 bits or as 4194304 words × 16 bits. The TC58FVM6T2A/B2A features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The TC58FVM6T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation. FEATURES • Power supply voltage • Block erase architecture VDD = 2.3 V~3.
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