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TC58DVG02A1FI0 - 1 Gbit (128M x *8its) CMOS NAND EPROM

Description

The TC58DVG02A1 is a single 3.3 V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 8192 blocks.

Features

  • Organization Memory cell allay 528 × 256K × 8 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Multi Block Program, Multi Block Erase Mode control Serial input/output Command control.
  • Power supply VCC = 2.7 V to 3.6 V Program/Erase Cycles 1E5 cycle (with ECC) Access time Cell array to register 25 µs max Serial Read Cycle 50 ns min Operating current Read (50 ns cy.

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Datasheet Details

Part number TC58DVG02A1FI0
Manufacturer Toshiba
File Size 466.02 KB
Description 1 Gbit (128M x *8its) CMOS NAND EPROM
Datasheet download datasheet TC58DVG02A1FI0 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TC58DVG02A1FTI0 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 1-GBIT (128M × 8 BITS) CMOS NAND E PROM DESCRIPTION The TC58DVG02A1 is a single 3.3 V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 8192 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes × 32 pages). The TC58DVG02A1 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs.
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