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TC55329AP-25 - 32K x 9-Bit CMOS SRAM

Download the TC55329AP-25 datasheet PDF. This datasheet also covers the TC55329AP-15 variant, as both devices belong to the same 32k x 9-bit cmos sram family and are provided as variant models within a single manufacturer datasheet.

Description

The TC55329AP/AJ is a 294,912 bit high speed CMOS static random access memory organized as 32,768 words by 9 bits and operated from a single 5V supply.

Toshiba's advanced CMOS technology and circuit design enable high speed operation.

Features

  • low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an output enable input (OE) for fast memory access. Also, the device power between memory accesses is reduced by an automatic power down circuit. The TC55329AP/AJ is suitable for use in high speed.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC55329AP-15-Toshiba.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TOSHIBA 1l:55329lU?/AJ-15/20/25/35 SILICON GATE CMOS 32,768 WORD x 9 BIT CMOS STATIC RAM Description The TC55329AP/AJ is a 294,912 bit high speed CMOS static random access memory organized as 32,768 words by 9 bits and operated from a single 5V supply. Toshiba's advanced CMOS technology and circuit design enable high speed operation. The TC55329AP/AJ features low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an output enable input (OE) for fast memory access. Also, the device power between memory accesses is reduced by an automatic power down circuit. The TC55329AP/AJ is suitable for use in high speed applications such as cache memory and high speed storage. All inputs and outputs are TIL compatible.
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