Description
The UG series of ULCs is well suited for conversion of medium- to-large sized CPLDs and FPGAs.
Features
- D High performance ULC family suitable for medium- to large-sized CPLDs and FPGAs D Conversions to over 200,000 FPGA gates D Pin counts to over 300 pins D Any pin-out matched due to limited number of dedicated pads D Advanced 0.6-µm (drawn)/0.45-µm (effective) feature size D Triple-layer or dual-layer metal CMOS technology D High speed performance:.
- 250-ps typical cell delay.
- 350-MHz toggle rate D Full range of packages: DIP, SOIC, LCC/PLCC, PQFP/TQFP, PGA/PPGA D 3.3V and/or 5.
UG09_Temic.pdf
