UG09 Datasheet (Temic)

UG09, 0.6um ULC

The UG series of ULCs is well suited for conversion of medium- to-large sized CPLDs and FPGAs.

Devices are implemented in high-performance CMOS technology with 0.6-µm (drawn) channel lengths, and are capable of supporting flip-flop toggle rates of 350 MHz, operating clock frequencies up to 150 MHz a

UG09 Features

* D High performance ULC family suitable for medium- to large-sized CPLDs and FPGAs D Conversions to over 200,000 FPGA gates D Pin counts to over 300 pins D Any pin-out matched due to limited number of dedicated pads D Advanced 0.6-µm (drawn)/0.45-µm (effective) feature size D Triple-layer or dual-lay