Datasheet4U Logo Datasheet4U.com

TN2425 - N-Channel Enhancement-Mode Vertical DMOS FETs

Description

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process.

Features

  • Low threshold.
  • High input impedance.
  • Low input capacitance.
  • Fast switching speeds.
  • Low on-resistance.
  • Free from secondary breakdown.
  • Low input and output leakage.

📥 Download Datasheet

Datasheet Details

Part number TN2425
Manufacturer Supertex Inc
File Size 344.79 KB
Description N-Channel Enhancement-Mode Vertical DMOS FETs
Datasheet download datasheet TN2425 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
TN2425 N-Channel Vertical DMOS FET Microchip
TN2404K N-Channel 240 -V (D-S) MOSFET Vishay Siliconix
TN2404K N-Channel 240 -V (D-S) MOSFET Vishay Siliconix
TN2404K N-Channel 240 -V (D-S) MOSFET Vishay Siliconix
TN2404K-T1 N-Channel 240 -V (D-S) MOSFET Vishay Siliconix

Other Datasheets by Supertex Inc

Part Number Description
TN2435 N-Channel Enhancement-Mode Vertical DMOS FETs
TN2106 N-Channel Enhancement-Mode Vertical DMOS FETs
TN2124 N-Channel Enhancement-Mode Vertical DMOS FETs
TN2130 N-Channel Enhancement-Mode Vertical DMOS FETs
TN2501 N-Channel Enhancement-Mode Vertical DMOS FETs

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Supertex inc. TN2425 N-Channel Enhancement-Mode Vertical DMOS FET Features ►► Low threshold ►► High input impedance ►► Low input capacitance ►► Fast switching speeds ►► Low on-resistance ►► Free from secondary breakdown ►► Low input and output leakage Applications ►► Logic level interfaces – ideal for TTL and CMOS ►► Solid state relays ►► Battery operated systems ►► Photo voltaic drives ►► Analog switches ►► General purpose line drivers ►► Telecom switches General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process.
Published: |