Description
The SK10/100EL15W is a low skew 1:4 clock distribution chips designed explicitly for low skew clock distribution applications.
input and bypassed to VCC via a 0.01 µF capacitor.
Features
- a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pull-down resistor) the SEL pin will select the differential clock input. The common enable (EN.
- ) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with.
SK10EL15W_SemtechCorporation.pdf
