M312L2923BG0-B0 - DDR SDRAM Registered Module

Product Overview

Samsung

Datasheet Details

Part number	M312L2923BG0-B0
Manufacturer	Samsung
File Size	274.42 KB
Description	DDR SDRAM Registered Module
Datasheet	M312L2923BG0-B0 Datasheet
Additional preview pages of the M312L2923BG0-B0 datasheet.

Product details

Description

Pin Name A0 ~ A12 BA0 ~ BA1 DQ0 ~ DQ63 DQS0 ~ DQS17 CK0,CK0 ~ CK2, CK2 CKE0, CKE1(for double banks) CS0, CS1(for double banks) RAS CAS WE CB0 ~ CB7 Function Address input (Multiplexed) Bank Select Address Data input/output Data Strobe input/output Clock input Clock enable input Chip select input Row address strobe Column address strobe Write enable Check bit(Data-in/data-out) Pin Name DM0 ~ DM8 VDD VDDQ VSS VREF VDDSPD SDA SCL SA0 ~ 2 NC Data - in mask Power supply (2.5V) Power Supply for DQS(2.

Features

3 I/O 2 I/O 1 I/O 0 CS DM D4 DQS I/O 3 I/O 2 I/O 1 I/O 0 CS DM DQS13 (DM4) DQ36 DQ37 DQ38 DQ39 D22 DQS I/O 0 I/O 1 I/O 2.

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Published: May 2, 2005 |