S3P7295 - The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

Samsung semiconductor

Datasheet Details

Part number	S3P7295
Manufacturer	Samsung semiconductor
File Size	207.71 KB
Description	The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Datasheet	S3P7295_Samsungsemiconductor.pdf

Table 1-1.

Memory.
256 × 4-bit RAM (excluding LCD display RAM) 16,384 × 8-bit ROM Memory-Mapped I/O Structure.
Data memory bank 15 Power-Down Modes.
Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Sub system clock stop mode 8 I/O Pins.
I/O: 8 pins LCD Controller/Driver.
44 segments and 16 common terminals (8, 12 and 16 common selectable) Internal resistor circuit for LCD bi.

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Published: Apr 7, 2005 |