KT8555J

The KT8555J is TIME SLOT ASSIGNMENT CIRCUIT designed by Samsung semiconductor.

Product Overview

Samsung semiconductor

Datasheet Details

Part number	KT8555J
Manufacturer	Samsung semiconductor
File Size	96.48 KB
Description	TIME SLOT ASSIGNMENT CIRCUIT
Datasheet	KT8555J_Samsungsemiconductor.pdf
Additional preview pages of the KT8555J datasheet.

Product details

Description

Pin No 3 1 18 16 4 2 19 17 5 6 7 8 9 10 11 12 Symbol FSX0 FSX1 FSX2 FSX3 FSR0 FSR1 FSR2 FSR3 TSX DC CLKC CS MODE GND BCLK XSYC TIME SLOT ASSIGNMENT CIRCUIT Description A frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a valid transmit time slot assignment is made.A frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a valid receive time slot assignment is made.This pin pulls low during any active transmit time slot

Features

l l l l l l l l Single, 5V operation Low power consumption: 5mW Controls four 1 CHIP CODEC Independent transmit and receive frame syncs enables channel unidirectional mode Up to 64 time slots per frame Compatible with KT8554/7 CODECs TTL and CMOS compatible.

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Other Datasheets by Samsung semiconductor

KT8555 - TIME SLOT ASSIGNMENT CIRCUIT
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Published: Apr 5, 2005 |