| Part number | K7I643684M, K7I641884M |
|---|---|
| Manufacturer | Samsung semiconductor |
| File Size | 438.50 KB |
| Description | (K7I641884M / K7I643684M) 72Mb DDRII SRAM Specification |
| Datasheet |
 K7I641884M_Samsungsemiconductor.pdf
|
| Note |
This datasheet PDF includes multiple part numbers: K7I643684M, K7I641884M. Please refer to the document for exact specifications by model. |
Input Clock Input Clock for Output Data Output Echo Clock DLL Disable when low Burst Count Address Inputs Address Inputs Data Inputs Outputs Read, Write Control Pin, Read active when high Synchronous Load Pin, bus Cycle sequence is to be defined when low Block Write Control Pin,active when low Input Reference Voltage Output Driver Impedance Control Input Power Supply (1.8 V) Output Power Supply (1.5V or 1.8V) Ground JTAG Test Mode Select JTAG Test Data Input JTAG Test Clock JTAG Test Data Output
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