PSD813F1-A Datasheet (STMicroelectronics) - Flash In-System Programmable (ISP) Peripherals

PSD813F1-A, Flash In-System Programmable (ISP) Peripherals

10 8.0 PSD813F1 Register Description and Address Offset 14 9.0 PSD813F1 Functional Blocks 15 9.1 Memory Blocks 15 9.1.1 Main Flash and Secondary EEPROM 15 9.1.2 SRAM 29 9.1.3 Memory Select Signals29 9.1.4 Page Register32 9.2 PLDs 33 9.2.1 Decode PLD (DPLD) 35 9.2.2 Complex PLD (CPLD) 35 9.3 Microco

PSD813F1-A Features

* SUMMARY s Single Supply Voltage:

* 5 V±10% for PSD813F1-A

* 3.3 V±10% for PSD813F1-AV s Up to 1Mbit of Primary Flash Memory (8 uniform sectors) s 256Kbit Secondary EEPROM (4 uniform sectors) s Up to 16Kbit SRAM s Over 3,000 Gates of PLD: DPLD and CPLD s 27 Reconfigurable I/O ports s