M68Z512 Datasheet - ST Microelectronics

M68Z512, 4 Mbit 512Kb x8 Low Power SRAM with Output Enable

M68Z512 4 Mbit (512Kb x8) Low Power SRAM with Output Enable s ULTRA LOW DATA RETENTION CURRENT * 100nA (typical) * 10µA (max) s s s

Features

* fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible. This device has an automatic power-down feature, reducing the power consumption by over 99% when desel

M68Z512_STMicroelectronics.pdf