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M59BW102 - 1 Mbit 64Kb x16 / Burst Low Voltage Flash Memory

Description

The M59BW102 is a non-volatile memory that may be erased electrically at the chip level and programmed in-system on a Word-by-Word basis using only a single 3V VCC supply.

For Program and Erase operations the necessary high voltages are generated internally.

Features

  • an interleaved access modality which allows extremely fast access time. The device is offered in TSOP40 (10 x 14mm) package. Figure 1. Logic Diagram VCC 16 A0-A15 W E G ALE M59BW102 16 DQ0-DQ15 VSS AI02763B March 2000 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/24 M59BW102 Figure 2. TSOP Connections Table 1. Signal Names A0-A15 DQ0-DQ7 Address Inputs Data Inputs/Outputs, Command Inputs Data.

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Full PDF Text Transcription

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M59BW102 1 Mbit (64Kb x16, Burst) Low Voltage Flash Memory PRELIMINARY DATA s 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS SEQUENTIAL CYCLE TIME: 25ns RANDOM ACCESS TIME PROGRAMMING TIME: 10µs typical INTERLEAVED ACCESS TIME: 16ns CONTINUOUS MEMORY INTERLEAVING TSOP40 (N) 10 x 14mm s s s s s – Unlimited Linear Access Data Output s PROGRAM/ERASE CONTROLLER (P/E.C.
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