74V2T08 Datasheet (ST Microelectronics)

74V2T08, DUAL 2-INPUT AND GATE

The 74V2T08 is an advanced high-speed CMOS DUAL 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.

Power down protection i

www.DataSheet4U.com 74V2T08 DUAL 2-INPUT AND GATE s s s s s s s s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2T08STR