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R9A02G021 32-Bit MCU

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Description

Datasheet R9A02G021 32-Bit MCU based on RISC-V R01DS0422EJ0110 Rev.1.10 Feb 29, 2024 Ultra low power 48 MHz Renesas RISC-V core with 128-KB code fl.
Maximum operating frequency: up to 48 MHz. Instruction-set architecture (ISA). RISC-V RV32I base integer instruction set.

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Features

* Features
* RISC-V Core
* Renesas RISC-V instruction-set architecture (RV32I [MACB])
* Maximum operating frequency: 48 MHz
* Debug and Trace: RISC-V External Debug Support
* Debug Port: cJTAG
* 32-pin HWQFN (5 mm × 5 mm, 0.5 mm pitch)
* 24-pin HWQFN (4 mm × 4 m

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