Description
Maximum operating frequency: up to 48 MHz
Arm Cortex-M4 core
- Revision: r0p1-01rel0 - Armv7E-M architecture profile - Single precision floating-point unit compliant with the ANSI/IEEE Std 754-2008.
Arm Memory Protection Unit (Arm MPU) - Armv7
Features
- Features.
- Arm Cortex-M4 Core with Floating Point Unit (FPU).
- Armv7E-M architecture with DSP instruction set.
- Maximum operating frequency: 48 MHz.
- Support for 4-GB address space.
- Arm Memory Protection Unit (Arm MPU) with 8 regions.
- Debug and Trace: ITM, DWT, FPB, TPIU, ETB.
- CoreSight™ Debug Port: JTAG-DP and SW-DP.
- Memory.
- 256-KB code flash memory.
- 8-KB data flash memory (100,000 program/erase (P/E) cycles).
- 32-KB SRAM.
- Flash Cache (FC.
R7FA4M1AB3CFP-Renesas.pdf
