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R5F52316CDFL - MCU

Download the R5F52316CDFL datasheet PDF. This datasheet also covers the R5F52318ADLA variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Features

  • 32-bit RXv2 CPU core.
  • Max. operating frequency: 54 MHz Capable of 88.56 DMIPS in operation at 54 MHz.
  • Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported.
  • Built-in FPU: 32-bit single-precision floating point (compliant to IEEE754).
  • Divider (fastest instruction execution takes two CPU clock cycles).
  • Fast interrupt.
  • CISC Harvard architecture with 5-stage pipeline.
  • Variable-length instructi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F52318ADLA-Renesas.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RX230 Group, RX231 Group Renesas MCUs R01DS0261EJ0120 Rev.1.20 Sep 28, 2018 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory, various communication functions including USB 2.0 full-speed host/function/OTG, CAN, SD host interface, serial sound interface, capacitive touch sensing unit, 12-bit A/D, 12-bit D/A, RTC, Encryption functions Features ■ 32-bit RXv2 CPU core • Max. operating frequency: 54 MHz Capable of 88.
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