R5F513T5ADFL - 32-MHz 32-bit RX MCU

Renesas

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Datasheet Details

Part number	R5F513T5ADFL
Manufacturer	Renesas
File Size	1.02 MB
Description	32-MHz 32-bit RX MCU
Datasheet	R5F513T5ADFL-Renesas.pdf

R5F513T5ADFL Product details

Description

CPU CPU Maximum operating frequency: 32 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per clock cycle Address space: 4-Gbyte linear Register set General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit registers Basic instructions: 73 Variable-length instruction format DSP instructions: 9 Addressing modes: 10 Data arrangement Instructions: Little endian Data: Selectable as lit

Features

32-bit RX CPU core.
Max. operating frequency: 32 MHz Capable of 50 DMIPS in operation at 32 MHz.
Accumulator handles 64-bit results (for a single instruction) from 32-bit × 32-bit operations.
Multiplication and division unit handles 32-bit × 32-bit operations (multiplication instructions take one CPU clock cycle).
Built-in FPU: 32-bit single-precision floating point (compliant to IEEE754).
Fast interrupt.
CISC Harvard architecture with 5-stage pipeline.
V.

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Published: Feb 22, 2025 |