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R5F1214AASP - MCU

This page provides the datasheet information for the R5F1214AASP, a member of the R5F1211CASP MCU family.

Features

  • Low power consumption technology.
  • VDD = single power supply voltage of 2.4 to 5.5 V.
  • HALT mode.
  • STOP mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.0625 μs: @ 16 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock).
  • Address space: 1 MB.
  • General-purpose registers: (8-bit register × 8) × 4 banks.

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Full PDF Text Transcription

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DATASHEET RL78/G16 RENESAS MCU R01DS0431EJ0110 Rev.1.10 Aug 31, 2023 True low-power platform, 61-µA/MHz operating current, TA = 125°C operation, from 10 to 32 pins, 16 to 32 KB code flash memory, 2 KB RAM, Capacitive touch sensing unit, 2.4 to 5.5 V 1. OUTLINE 1.1 Features  Low power consumption technology  VDD = single power supply voltage of 2.4 to 5.5 V  HALT mode  STOP mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.0625 μs: @ 16 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 μs: @ 32.
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