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R5F10EGAGFB - MCU

Download the R5F10EGAGFB datasheet PDF. This datasheet also covers the R5F10E8AALA variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Features

  • Ultra-Low Power Technology.
  • 1.6 V to 3.6 V operation from a single supply.
  • Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA.
  • Halt (RTC + LVD): 0.57 µA.
  • Snooze: 0.7 mA (UART), 0.6 mA (ADC).
  • Operating: 66 µA/MHz 16-bit RL78 CPU Core.
  • Delivers 41 DMIPS at maximum operating frequency of 32 MHz.
  • Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles.
  • CISC Architecture (Harvard) with 3-stage pipelin.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F10E8AALA-Renesas.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Part Number Description
R5F10EGAGNA MCU
R5F10EGAAFB MCU
R5F10EGAANA MCU
R5F10EGCAFB MCU
R5F10EGCANA MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet Specifications in this document are tentative and subject to change. RL78/G1A R01DS0151EJ0230 RENESAS MCU Rev.2.30 Apr 26, 2024 Combines Multi-channel 12-Bit A/D Converter, True Low Power Platform (as low as 66 µA/MHz, and 0.57 µA for RTC + LVD), 1.6 V to 3.6 V operation, 16 to 64 Kbyte Flash, 41 DMIPS at 32 MHz 1. OUTLINE 1.1 Features Ultra-Low Power Technology • 1.6 V to 3.6 V operation from a single supply • Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA • Halt (RTC + LVD): 0.57 µA • Snooze: 0.7 mA (UART), 0.
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