Description
Maximum operating frequency 320-pin FBGA: 600 MHz 176-pin HLQFP: 450 MHz
32-bit CPU Cortex-R4F designed by ARM (core revision r1p4)
Address space: 4 Gbytes
Instruction cache: 8 Kbytes (with ECC with)
Data cache: 8 Kbytes (with ECC with)
Tightly coupled memory (TCM)
ATCM: 512 Kbytes (with ECC with) BTCM: 32 Kbytes (with ECC with)
Instruction set: ARMv7-R architecture, so support includes Thumb and Thumb-2
Data arrangement Instructions: Little endian
Features
- On-chip 32-bit ARM Cortex-R4F processor.
- High-speed realtime control with maximum operating frequency of 450/600 MHz Capable of 747/996 DMIPS (in operation at 450/600 MHz).
- On-chip 32-bit ARM Cortex-R4F (revision r1p4).
- Tightly coupled memory (TCM) with ECC: 512 Kbytes/32 Kbytes.
- Instruction cache/data cache with ECC: 8 Kbytes per cache.
- High-speed interrupt.
- The FPU supports addition, subtraction, multiplication, division, multiply-and-accumulate, and square-.