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ICS95V157 2.5V Single-Ended to SSTL_2 Clock Driver

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Description

ICS95V1 5 7 2.5V Single-Ended to SSTL_2 Clock Driver (45MHz - 233MHz) Recommended Application: Single-ended clock input with zero delay board fan ou.
Features:. Low skew, low jitter PLL clock driver. 1 to 10 differential clock distribution (SSTL_2). Feedback pin for input.

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Datasheet Specifications

Part number
ICS95V157
Manufacturer
Renesas ↗
File Size
352.87 KB
Datasheet
ICS95V157-Renesas.pdf
Description
2.5V Single-Ended to SSTL_2 Clock Driver

Features

* Low skew, low jitter PLL clock driver
* 1 to 10 differential clock distribution (SSTL_2)
* Feedback pin for input to output synchronization
* PD# for power management
* Spread Spectrum tolerant inputs Switching Characteristics:
* CYCLE - CYCLE jitte

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