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ICS93705 DDR Phase Lock Loop Zero Delay Clock Buffer

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Description

ICS9370 5 DDR Phase Lock Loop Zero Delay Clock Buffer Recommended Application: DDR Zero Delay Clock Buffer Product .
Features:. Low skew, low jitter PLL clock driver. I2C for functional and output control. Feedback pins for input to output.

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Datasheet Specifications

Part number
ICS93705
Manufacturer
Renesas ↗
File Size
306.81 KB
Datasheet
ICS93705-Renesas.pdf
Description
DDR Phase Lock Loop Zero Delay Clock Buffer

Features

* Low skew, low jitter PLL clock driver
* I2C for functional and output control
* Feedback pins for input to output synchronization
* Spread Spectrum tolerant inputs
* 3.3V tolerant CLK_INT input Switching Characteristics:
* PEAK - PEAK jitter (66MHz)

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