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HD74HC107 - Dual J-K Flip-Flops

Description

This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.

Each one has independent J, K, clock, and clear inputs and Q and Q outputs.

Clear is independent of the clock and accomplished by a low level on the input.

Features

  • High Speed Operation: tpd (Clock to Q) = 19 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C).
  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC107P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74HC107FPEL SOP-14 pin (JEITA) PRSP0014DF-.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74HC107 Dual J-K Flip-Flops (with Clear) REJ03D0559-0200 (Previous ADE-205-432) Rev.2.00 Oct 06, 2005 Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and accomplished by a low level on the input.