8V41N012A Datasheet (Renesas)

8V41N012A, Clock Generator

The 8V41N012A is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors.

This high-performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks, and the clocks for both the Gigabit Ethernet MA

8V41N012A Features

* ▪ Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO, and GbE, HCSL interface levels ▪ One single-ended QG LVCMOS/LVTTL clock output at 125MHz ▪ One single-ended QF LVCMOS/LVTTL clock output at 50MHz ▪ Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz ▪ Selectable