843S06 Datasheet (Renesas) - PLL Clock Synthesizer

843S06, PLL Clock Synthesizer

The 843S06 is a low voltage, low skew 3.3V LVPECL Clock Synthesizer.

The device targets clock distribution in SDH/SONET telecommunication systems but is well suited for a wide range of applications requiring high performance high-speed clock synthesis.

The device implements a fully integrated multip

843S06 Features

* Six differential 3.3V LVPECL outputs 1,244.16/622.08MHz; 1,244.16/622.08MHz 622.08/311.04MHz; 311.04/155.52MHz 155.52/77.76MHz; 77.76/38.88MHz

* Three selectable differential reference clock inputs Clock frequency range: 19MHz to 622MHz

* REF_CLKx, nREF_CLKx pairs ca