PO74HSTL314A Datasheet (Potato Semiconductor Corporation) - 3.3V 2:4 Differential Clock/Data Fanout Buffer

PO74HSTL314A, 3.3V 2:4 Differential Clock/Data Fanout Buffer

The PO74HSTL314 is a low-skew, 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

The device is implemented on 0.35um CMOS technology and has a fully differential internal architecture that is optimized to achieve low si

PO74HSTL314A Features

* . Patented Technology . Four HSTL differential outputs . The two pair of LVDS/LVPECL/HSTL/ differential or single-ended inputs . Hot-swappable/-insertable . Operating frequency up to 500MHz with 2pf load . Operating frequency up to 480MHz with 5pf load . Operating frequency up to 400MHz with 15pf l