74LVC109 Datasheet (Philips) - Dual JK flip-flop

74LVC109, Dual JK flip-flop

The 74LVC109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.

The 74LVC109 is a dual positive-edge triggered JK-type flip-flop featuring individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs.

The set an

74LVC109 Features

* Wide supply voltage range of 1.2 to 3.6 V

* In accordance with JEDEC standard no. 8-1A.

* Inputs accept voltages up to 5.5 V

* CMOS low power consumption

* Direct interface with TTL levels

* Output capability: standard

* ICC category: flip-f