Description
The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).
Features
- s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from.
- 40 °C to +80 °C and from.
- 40 °C to +125 °C. Philips Semiconductors
74HC73
Dual JK flip-flop with reset; negative-edge trigger
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol tPHL, tPLH Parameter propagation delay nCP to nQ nCP t.
74HCT73_PhilipsSemiconductors.pdf
