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74HC390 Dual decade ripple counter

74HC390 Description

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

74HC390 Features

* Two BCD decade or bi-quinary counters
* One package can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100
* Two master reset inputs to clear each decade counter individually
* Output capability: standard

74HC390 Applications

* of divide-by-2, 4, 5, 10, 20, 25, 50 or 100. Each section is triggered by the HIGH-to-LOW transition of the clock inputs (nCP0 and nCP1 ). For BCD decade operation, the nQ0 output is connected to the nCP1 input of, the divide-by-5 section. For bi-quinary decade operation, the nQ3 output is connected

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