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74HC137 3-to-8 line decoder/demultiplexer

74HC137 Description

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The 74HC/HCT137 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

74HC137 Features

* Combines 3-to-8 decoder with 3-bit latch
* Multiple input enable for easy expansion or independent controls
* Active LOW mutually exclusive outputs
* Output capability: standard

74HC137 Applications

* in bus oriented systems. QUICK REFERENCE DATA GND = 0 V; Tamb= 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An to Yn LE to Yn E1 to Yn E2 to Yn CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo)

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3-to-8 line decoder demultiplexer Philips
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