PLL650-03 Datasheet (PhaseLink) - Low EMI Network LAN Clock

PLL650-03, Low EMI Network LAN Clock

The PLL 650-03 is a low cost, low jitter, and high performance clock synthesizer.

With PhaseLink’s proprietary analog Phase Locked Loop techniques, the chip accepts 25.0 MHz crystal, and produces multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs.

BLOCK DIAGRAM XIN XOUT

PLL650-03 Features

* e h

* Full CMOS output swing with 40-mA output drive S output capability. 25-mA drive at TTL level. a t

* Advanced, low power, sub-micron CMOS processes. a

* 25MHz .D fundamental crystal or clock input.

* 4 outputs fixed at 50MHz with output disable, 1 output w select