PLL520-30 Datasheet (PhaseLink Corporation) - PECL and LVDS Low Phase Noise VCXO

PLL520-30, PECL and LVDS Low Phase Noise VCXO

Y (0,0) PLL520-30 is a VCXO IC specifically designed to pull frequency fundamental crystals from 65MHz to 130MHz, with selectable PECL or LVDS outputs and OE logic (enable high or enable low).

Its design was optimized to tolerate higher limits of interelectrodes capacitance and bonding capacitanc

PLL520-30 Features

* 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz

* 130MHz (no PLL). Low Injection Power for crystal 50uW. Complementary outputs: PECL or LVDS. Selectable OE Logic Integrated variable capaci